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Berkeley Design Automation
Results: 35

#	Item
21	FRAIGs: A Unifying Representation for Logic Synthesis and Verification Alan Mishchenko, Satrajit Chatterjee, Roland Jiang, Robert Brayton Department of EECS, University of California, Berkeley {alanmi, satrajit, jiejiang Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2005-04-01 15:19:32 Boolean algebra Diagrams Digital electronics And-inverter graph Binary decision diagram Logic optimization Model checking Boolean function Logic synthesis Electronic engineering Electronic design automation Formal methods
22	An Integrated Technology Mapping Environment Alan Mishchenko Satrajit Chatterjee Robert Brayton Department of EECS University of California, Berkeley {alanmi, satrajit, brayton}@eecs.berkeley.edu Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2005-07-16 00:13:15 Integrated circuits Electronic design Placement Logic synthesis Field-programmable gate array Jason Cong Complex programmable logic device Application-specific integrated circuit Electronic engineering Electronics Electronic design automation
23	August 31, 1992 SI T Y• O F• Add to Reading List Source URL: ptolemy.eecs.berkeley.edu Language: English - Date: 1999-03-18 17:16:42 Electronic design automation Visual programming languages Logic design Programming paradigms SIGNAL Dataflow Logic simulation Prototype Simulation software Electronic engineering Computing Digital electronics
24	Analysis and Demonstration of MEM-Relay Power Gating Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2013-06-17 14:53:29 Electromagnetism Logic families Electronic design automation Electronic design Integrated circuits Power gating MOSFET CMOS Logic gate Electronic engineering Electrical engineering Digital electronics
25	The Design Automation Conference - the premier conference on design of electronic circuits and systems, electronic design automation and embedded systems and software - will be celebrating its 50th anniversary June 2-6 i Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2013-05-10 11:30:30 Development Digital signal processing Electronic circuits Electronic engineering Design Automation Conference Alberto Sangiovanni-Vincentelli
26	BERKELEY FACULTY AND ALUMNI SWEEP AWARDS AT THE 50TH DESIGN AUTOMATION CONFERENCE The Design Automation Conference, the largest techn Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2013-06-14 12:34:12 Academic administration Professor Titles Year of birth missing Alberto Sangiovanni-Vincentelli Education Academia Knowledge
27	Faculty Candidate Talk: Wednesday, April 6, 2005, 4-5 p.m. 306 Soda “Reasoning about Reliability and Security Using Boolean Methods” Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2005-03-07 18:39:06 Electronic design automation Formal methods NP-complete problems Logic in computer science Model theory Uclid Boolean satisfiability problem Decision problem Satisfiability Theoretical computer science Mathematics Computational complexity theory
28	CrowdMine: Towards Crowdsourced Human-Assisted Verification Wenchao Li Sanjit A. Seshia Somesh Jha Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2012-05-25 20:37:06 Applied mathematics Electronic engineering Electronic design automation Electronic design Human-based computation Crowdsourcing Formal verification Software verification Model checking Theoretical computer science Formal methods Logic in computer science
29	Microsoft Word - BDA PressRel_Altos_April5_2011.doc Add to Reading List Source URL: www.altos-da.com Language: English - Date: 2011-04-05 14:09:38 Electronic design automation Berkeley Design Automation Electronic design Altos Design Automation Integrated circuit design SPICE Electronic circuit simulation Application-specific integrated circuit Simucad Electronic engineering Electronics Integrated circuits
30	Applying Logic Synthesis for Speeding Up SAT Niklas Een, Alan Mishchenko, Niklas S¨ orensson Cadence Berkeley Labs, Berkeley, USA. EECS Department, University of California, Berkeley, USA. Chalmers University of Technol Add to Reading List Source URL: minisat.se Language: English - Date: 2007-05-29 19:29:26 Theoretical computer science Conjunctive normal form And-inverter graph Science Mathematics Circuit Canonical form Boolean network Logic Electronic design automation Formal methods